What is a SAR-Converter?

(Search and Rescue? No, SAR has a different meaning here.)

Well, the general question is how can we digitize an analog value?

There are several approaches for this question, each of them has its special advantages and disadvantages.

In general, you can compare the analog value with a known value generated by a Digital to Analog Converter (DAC) using an analog comparator. For an 8 bit converter you would have to test 255 steps to see when the comparator flips over.

You could also use 255 comparators (each one connected to a 1 bit higher reference than the previous one) and see how many of them stay at 0, this really exists and is called a Flash-Converter, probably because of it is damned fast (and expensive) but we won't treat this type here.

A SAR-Converter optimizes this: In the first step it compares the value with half of its reference. If it is bigger, it adds a quarter else it subtracts a quarter. In the second step, it adds or subtracts an 8th, then a 16th and so on. It only needs a single comparator and the successive approximation register, that's why the name.
In the picture, you can see the approximation for values of 43, 125 and 233.

So a SAR covers 2ⁿ steps with only n comparisons. To digitize a signal with 8 bits of accuracy it would need 8 steps (that is 0.4% of precision, about the maximum accuracy you could achieve on a precision analog instrument with a mirror type scale), 12 steps for 12 bits (0.02%) and so on.

Up to now, precision is idealized, of course. In practice, the accuracy of the DAC is limited and introduces errors. The offset voltage of the comparator adds an error since the precision of the comparison is reduced. Additional error sources are noise and crosstalk from other signals which may be considerately high, depending on the layout and quality of the power supply.

In our case, with a simple RC filter on a port pin, the DAC is probably the weakest part. In theory, we have an ideal switch connecting the pin with 0 delay and 0 Ω to VCC (which is ideally stable) or GND. In fact however, we have FETs switching, with asymmetric R_dson and asymmetric delay. Also, the comparator (in our case the integrated comparator of the ATMega128) contributes with its high offset voltage of 40 mV significantly to the total error. 40 mV at 5 V FSR result in a mere 7 Bit accuracy! In fact, I did not verify the DAC accuracy until now but I would expect that more than 8 bits of resolution would not make sense with such a circuit. We can not even guarantee 8 bits although the circuit may make it normally. Anyway, it is sufficient for our demands here.